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The rapid evolution of artificial intelligence (AI) and the automotive industry’s transition to centralized compute and zonal architectures are fundamentally reshaping the memory market. As vehicles become rolling data centers - processing streams from dozens of high-resolution sensors, running advanced driver-assistance systems (ADAS), and enabling immersive in-cabin experiences - the demand for memory bandwidth, reliability, and functional safety has never been higher. At the same time, AI workloads in both automotive and data center environments are pushing the limits of what’s possible, requiring not only more memory, but higher performing, safer, and more efficient memory solutions.
These trends are converging with a dramatic acceleration in design cycles. Automotive OEMs and AI platform providers can no longer afford multi-year development timelines; they need to bring new features to market in months, not years. This urgency has elevated the importance of deep, early collaboration between IP providers and memory suppliers. Nowhere is this more evident than in the close collaboration between Synopsys, a global leader in semiconductor IP, and Micron, a pioneer in advanced memory technologies.
The role of Synopsys: Enabling next-generation memory adoption
As the complexity of SoCs and system architectures grow, Synopsys plays a pivotal role in proliferating new memory technologies across the industry. Synopsys’ broad portfolio of silicon-proven IP includes complete solutions for advanced memory interfaces: the memory controller and the physical layer (PHY). These design blocks must not only support the latest standards, but also integrate specialized features—such as functional safety, reliability, and performance optimizations—tailored for demanding markets like automotive and AI.
An SoC memory controller and physical layer with Direct Link ECC Protocal (DLEP)
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Through our collaboration with Micron, Synopsys provides pre-verified and pre-validated IP optimized for Micron’s most advanced DRAM, including the groundbreaking Direct Link ECC Protocol (DLEP) for LPDDR5X. This tight integration accelerates time-to-market for SoC designers, reduces risk, and enables rapid adoption of new memory features that deliver real-world benefits.
“By partnering closely with Micron to align our silicon-proven IP with their DLEP-enabled memory ecosystem, we are driving a new standard for bandwidth, power-efficiency and functional-safety in automotive and AI platforms,” said Brett Murdock, Product Line Director of Memory Interface IP Solutions at Synopsys. “Together we’re enabling designers to shorten schedules, reduce risk and bring differentiated systems to market faster.”
What is DLEP and why does it matter?
DLEP (Direct Link ECC Protocol) is a transformative innovation in memory technology, designed to overcome the performance and efficiency penalties of traditional in-line ECC (Error Correction Code) schemes. In conventional systems, in-line ECC consumes valuable memory bandwidth and capacity, reducing the effective performance of AI and automotive platforms.
With DLEP, ECC is handled directly between the memory controller and DRAM, unlocking substantial system-level gains:
- 15–25% bandwidth increase: More data can be moved per second, critical for AI inference, sensor fusion, and real-time decision-making.1
- 11% capacity gain: More usable memory for applications, as less is reserved for ECC overhead.
- Up to 20% power reduction: Lower energy consumption, which is vital for electric vehicles and edge AI devices.
- Enhanced Functional Safety: DLEP-enabled LPDDR5X meets stringent ISO 26262 ASIL-D requirements, supporting the highest levels of automotive safety.
These benefits translate into faster, safer, and more efficient vehicles and AI systems. For example, next-generation ADAS platforms require up to 300-500 GB/s of memory bandwidth to process data from dozens of sensors and cameras in real time. DLEP makes this possible, while also reducing system cost and complexity.
Why high bandwidth and functional safety matter in automotive
ECC data transfers with standard DRAM versus DRAM with DLEP
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The shift to central compute and zonal architectures in automotive is driven by the need to consolidate dozens of legacy ECUs into a handful of powerful domain controllers. These controllers must handle everything from autonomous driving to infotainment, often running AI models locally for split-second decision-making. This architectural shift demands:
- Massive bandwidth: To ingest and process data from LiDAR, radar, cameras, and in-cabin sensors.
- Functional safety: To ensure that critical systems (braking, steering, ADAS) operate reliably, even in the presence of faults.
- Energy efficiency: To maximize range and minimize thermal constraints in electric vehicles.
DLEP-enabled LPDDR5X, delivered through the collaboration of Micron and Synopsys, is purpose-built to meet these needs. The result is a memory solution that not only keeps pace with the demands of AI and automotive compute but also sets a new standard for safety and efficiency.
The importance of ecosystem collaboration
The successful deployment of DLEP is a testament to the power of ecosystem collaboration. By working hand-in-hand from the earliest stages of development, Synopsys and Micron enable DLEP to seamlessly integrate into both the memory controller and PHY IP, as well as Micron’s DRAM devices. This approach accelerates customer adoption, reduces integration risk, and delivers proven, silicon-ready solutions to the market.
Advancing DLEP
As AI and automotive systems continue to converge, the need for high-performance, safe, and efficient memory has never been greater. DLEP is a breakthrough that delivers on all fronts—enabling higher bandwidth, greater capacity, lower power, and robust functional safety. By collaborating with Synopsys, SoC designers gain access to industry-leading IP that is pre-validated with Micron’s latest memory, ensuring faster time-to-market and a clear path to innovation.
In the race to deliver the next generation of intelligent vehicles and AI platforms, the collaboration between Synopsys IP and Micron DLEP-enabled memory is the winning formula.
1 LPDDR5X with enhanced ECC for automotive rises to the challenge | Micron Technology Inc. Measured against typical in-line system ECC schemes vs. DLEP
