Micron Insight Micron Blog
Memory // Events

Come see Micron at The Linley Group Processor Conference

By Jay Walstrum - 2017-09-27
Categories Communities Company Events Executive Insight Corner Innovations Memory Storage
Products Advanced Computing Solutions Advanced Solutions DRAM DRAM Modules Managed NAND Memory Memory Cards Multichip Packages NAND Flash NOR Flash SpecTek SSDs Storage Storage Platforms Ultra-Bandwidth Solutions

Linley Processor ConferenceJoin us to discover the latest update regarding high performance memory products!

Graphics memory presents the most compelling cost-to-performance memory solution to address the aggressive bandwidth requirements of high-end networking applications. The upcoming release of the JEDEC GDDR6 memory standard builds on the proven success of prior generations, providing a path toward a remarkable 1 terabyte of system memory bandwidth.

In this talk, the Micron team will discuss real-world networking applications leveraging the system-level benefits of GDDR, and how this latest high-performance graphics memory standard sets a clear course for system designers to significantly increase bandwidth to address the increasing demands of next-generation platforms. 

Explore Micron's networking innovations.

Jay Walstrum

Jay Walstrum

Jay Walstrum is a Senior System Architect for Micron’s Compute and Networking Business Unit, where he is focusing on new opportunities in the three to five-plus year timeframe. In his role, he also applies innovative technologies and memory architectures to solve customer system-level challenges.

Jay’s responsibilities include working closely with a market-strategy team to identify new technology, applications, product/architecture specifications, customers, and markets for new product concepts. He also actively works with customer system architects, technologists, third-party developers, and Micron’s Research and Development team to identify, define, and architect innovative memory solutions.

Before beginning with Micron in January 2013, Jay spent 22 years at Xilinx Corp, where he held various positions ranging from the Director of Quality, to the Senior Product Planning Manager, to the Strategic and Technical Marketing Leader.

Jay holds a BSEE from University of Southern California. He holds 11 patents in the areas of FPGA system Solutions and memory interface architecture.

Continue reading

Related posts

Memory

Automotive Memory: Quality vs. Functional Safety and Why It Matters

2023-03-16
This blog is focused on two automotive safety concepts: quality and functional safety. Quality refers to the fundamental design of the product and the test and yield processes that ensure the product can achieve as close to zero defects as possible. Functional safety focuses on two aspects: systematic and random fault coverage.
Read more >
Innovations // Memory

Redefining Performance with DDR5 and 4th Intel® Xeon® Platinum Processors

2023-01-10
With Intel’s latest announcement of 4th Gen Intel Xeon Scalable processors, the availability of DDR5-enabled platforms has grown enormously. Customers of all the leading data center platforms now have access to new systems offering incredible levels of performance, efficiency and reliability. Micron will continue to work with the full ecosystem of partners to ensure these platforms and solutions have the right Micron DDR5 memory options to deliver real customer value by ensuring that data continues to flow unimpeded as processor core counts grow.
Read more >
Company // Innovations // Memory

Building the Future of Memory Together With Our Supplier Partners

2022-11-14
Micron hosted its 2022 Supplier Day, highlighting its long-term growth plans, as well as partnership opportunities and awarding best-in-class performance by its suppliers in fiscal year 2022.
Read more >
+